A Clockwork Orange Choice and Life-Course Theory Essay...

1. The question is whether such a technique can really make a man good. Goodness comes from within, 6655321. Goodness is something chosen. When a man cannot choose he ceases to be a man (Burgess, 83). The priest would later say that Alex ceases to be a wrongdoer and a creature capable of moral choice. The priest is talking about the new rehabilitation program for which Alex becomes the first participant. Reflect on the priests statements. What does he mean? In regards to our society, do we take away the act of choice for juveniles? (Think about the theories that we have discussed. Are juveniles driven to delinquency or do they make a conscious choice between right and wrong?) The priests first statement is accurate in†¦show more content†¦2. Some of Alexs droogs and other acquaintances followed a different path than he did, but perhaps with certain similarities as well. How would life-course theory explain the various paths of these individuals? How would actions and behaviors define these individuals as criminal or not? Reflect on the entire book. Were there any life-course offenders? What about adolescent-limited offenders? What controls were in place, or not in place, to allow for those individuals to act as they did? As for Dim, Georgie, and Billyboy they all followed the life-course model. Georgie had an untimely death when breaking into somebodys house and was overpowered and killed. Though his life was not long, he did show signs of being very irritable and having low self-control. Even early in the book Alexs droogs were beating up men walking home at night for no apparent reason. This could also be applied to Dim and Billyboy as well. Also, the book never spoke of any direct controls in any of their lives and I am assuming that their parents were not exactly setting any good examples. Dim and Billyboy though, more specifically, found a life of crime in a high authority position. This life that they had taken on gave them the power and authority to continue on the life-course of crime. They picked up Alex, after he had gotten released, at the library when Alex was completely innocent. They then took Alex into a rural area toShow MoreRelatedA Clockwork Orange1450 Words   |  6 PagesAnthony Burgess A Clockwork Orange is a dystopian novel set in an oppressive, futuristic state. Published in 1962, A Clockwork Orange is an extremely intense, graphic, and, at times, horrifying novel. A reader begins to question their own values as they become numb and desensitized to the violence at hand. Both behaviorism and free will is occurring throughout A Clockwork Orange. A Clockwork Orange brings up a question, how much control of our own free will do we actually have? Do we reallyRead MoreStanley Kubrick Essay1863 Words   |  8 Pagesspecifically discussing five of my favorite Kubrick films to demonstrate various aspects of Kubrick as an auteur: Dr. Strangelove, the cult classic dark comedy about nuclear warfare, 2001: A Space Odyssey, a benchmark science fiction film, A Clockwork Orange, a dystopian commentary on our society, The Shining, a horror film that follows few rules, and Full Metal Jacket, a Vietnam movie filmed entirely in England. Kubrick is very fond of the three act structure. In fact, all of the aforementionedRead MoreA Clockwork Orange as an Allusion to Platos Mimetic Imagination4156 Words   |  17 Pagesmimetic imagination alludes to Stanley Kubrick’s postmodern film, A Clockwork Orange (1971), which features a youth gang driven by images of sex, violence, and drug, set in a dystopian future Britain. Furthermore, Kubrick’s film resembles Plato’s Allegory of the Cave, as the prisoners of the imaginary are introduced to new realities. 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Vocabulary instructionRead MoreLogical Reasoning189930 Words   |  760 Pagescontemporary texts in informal logic – keeping an eye on the sorts of arguments found in books on formal logic – forget, or underplay, how much of our daily reasoning is concerned not with arguments leading to truth-valued conclusions but with making choices, assessing reasons, seeking advice, etc. Dowden gets the balance and the emphasis right. Norman Swartz, Simon Fraser University v Acknowledgments For the 1993 edition: The following friends and colleagues deserve thanks for their help and

Why Was Vindolanda Built Free Essays

Vindolanda Vindolanda was one of a series of Roman forts built in northern England (Northumberland) in the last quarter of the 1st Century AD. It became an auxiliary fort which also had a substantial element of civilian accommodation. The forts stretched from east to west, and are considered to have been a consolidation of the frontier of the Roman Empire. We will write a custom essay sample on Why Was Vindolanda Built? or any similar topic only for you Order Now The Romans invaded southern Britain in AD43, and slowly moved north. At one point, they had hoped to conquer all of Britain, but never succeeded. Roman armies had advanced far into Scotland in the 70s AD. But either by choice or necessity, they abandoned these gains and formed a frontier stretching roughly from modern Newcastle in the east to modern Carlisle in the west. The forts, together with the east-west road now known as the Stanegate connecting them, formed this frontier for 40 years. Then Hadrian’s Wall was built just to the north, and the Stanegate forts either went out of use or changed their purpose. Vindolanda remained in use, though the ultimate purpose of its garrison (whether support for the Wall forts or protection in an unruly hinterland) isn’t fully understood. Vindolanda is permanently under investigation by archaeologists and it is estimated that there is sufficient work, for them for the next 150 years to complete the sites excavation. This Roman Auxiliary Fort guarded the Stanegate Road, which ran from the River Tyne, this would also have made it important in providing supplies to wall forts, maintaining a safe supply chain, as well as reinforcements either way if needed. Other smaller forts and matching camps would have been every days march, about 13 miles along the road. Roman soldiers needed to march from one part of the country to another quickly. So the Romans built roads. Roman roads were made from stones, and were better than muddy tracks for travel on foot or in carts. So they made travelling around Britain easier for everyone. You can still see the remains of some Roman roads today. All the roads they built were remarkably straight. The Romans knew that the shortest distance from one place to another is a straight line, but their roads did zigzag sometimes, to make going uphill easier. The road sloped from the middle to ditches either side, so rain water drained off. Romans made these roads were wide enough for two armies to go past without having to stop and to waste time. The Stanegate was the road closest to the fort Vindolanda. The Romans would always build a fort near a road, which made it easier for transport. The road was very useful; it was used for trading with the other tribes. In 54 BC Caesar had captured a hill-fort. Then, again, he went away. He did not think Britain was worth a long war, and he wanted to get back to Rome. Nearly a hundred years later, in AD 43, the Romans returned. Claudius sent an army to invade Britain. The army had four legions. This time the Romans conquered the southern half of Britain, and made it part of the Roman Empire. One of the main reasons why the Roman’s wanted to invade was the Britain’s wealth and the goods they owned and  he wanted to make Britain part of Rome’s  empire. The Picts and Brigantes are two of the oldest pre-roman inhabitants of Great Britain. Both inhabited and battled the Romans and each other for the lands of Northern England and Scotland. The picts were really rich and Romans wanted to take an advantage and take over. They invaded the south of Britain and they used the picts to trade with the Brigantes. The picts were the people from Caledonia (modern day Scotland). Some picts made friends with the Romans in return for keeping their land. The picts agreed to obey the Roman laws, pat the Roman taxes and to behave. The tribe agreed to give their land to the Romans unlike the Brigantes. Another tribe apart from the picts were the Brigantes which were a divided group from the Northern England. Most of these would not like each other due to any reason and had hatred against the Romans. The Brigantes fought, and eventually the Romans fell back to the more defensible Hadrian’s Wall. When the Roman Emperor Hadrian visited Britain in 122 AD he recognised the difficulties in establishing control in Caledonia and saw that it would be impossible to introduce the Picts to the Roman way of life. The Emperor therefore ordered the construction of a great defensive wall which would mark the northern limits of his empire and consolidate the hold on those parts of Britain already subdued. Hadrian’s empire would not include Caledonia. The Romans also had to defend Hadrian’s Wall, against attacks by Picts and other tribes these people lived in northern Britain, outside the Roman part. Soldiers sent to defend the wall lived in forts and camps. Vindolanda was a very well planned fort that was constructed on a flat hill at Northumberland at approximately 122AD. The fort itself was a playing-card shape which allowed the soldiers to see round the corner. The main site is on the top of a hill with much able to be viewed, plus a full size reproduction of a section of wall. It was one of the most important forts in Northern England, because it was continuously getting repaired and rebuilt. Vindolanda was built first in timber and earth; it was later built in stone. Archaeologists believe that there are the remains of ten forts in all. Buildings found so far include the fort walls, bath houses, granaries, officers, accommodation, barracks, a temple, and civilian housing, all served by paved roads. The fort had a hypocaust system visible under the stone floor to allow flow of air to keep food or metal items dry, preventing rotting or rust. The fort has four gateways north, east, south, west. The main part of the fort was the head quarters building which was always located at the centre of the fort. The building would always contain a well, and a strong room which would contain the valuables of the Roman soldiers. This was very important to a soldier and if they lost anything this meant that they’d lost their ago. The headquarters would also contain the weapons and equipment they would need. The mansio was an accommodation place for travellers from other armies, tribes and also for traders. The bathhouses were always outside the forts because they were a fire risk and it also made it easier for the civilians to use the bath as well as the soldiers. Another reason of the construction of Vindolanda was the geographical location, it was based on a flat hill which makes it very hard to attack and very easy to defend, because it is on a steep hill which makes the Romans see very easily over miles. The Romans used a very basic way to communicate during battles. They used a flag system which based a soldier miles away on a mountain and used green for safety and red for attack. This was very useful; the Romans were pre-warned if they were being attacked. The remains of a large roman bath house are south of the fort, and next to the fort is the remains of a civilian settlement (or vicus). A civilian settlement was next to the fort and these continued to be in use until the end of the Roman period around 410AD. The settlement was used for retired soldiers; local traders, smiths, tavern keepers, etc. liked both the protection and trade a fort could offer. Much of the civilian settlement has still not been uncovered, but its existence is apparent due to the unevenness and irregularity of the bumps and ridges in the ground. There was also the Tyne River by the fort which supplied the soldiers in the fort with clean water to use. They would throw the sewage out into the river. Vindolanda was one of the many forts in England, and it is the most common for wooden tablets discoveries. The tablets provide the best insight into life in the Roman army found anywhere in the world. There is a list of how many troops were present, the commanding officer’s cook’s diary, listing who he had to dinner and what they ate, and even a birthday greeting, with the commanders wife inviting the wife of another commander to her birthday party. How to cite Why Was Vindolanda Built?, Essay examples

Intelligent Spy Robo free essay sample

INTELLIGENT SPY ROBO-VER-02 INTRODUCTION This is one of the version of spy robot which we designed in this academic period. Intelligent spy robot project has been designed for the spying purpose . it is radio controlled and can be operated at a radial distance of 50 yards. Many time our army jawan need to venture into the enemy area just to track their activities. Which is often a very risky job, it may cost precious life. Such dangerous job could be done using small spy robot all the developed and advance nations are in the process of making combat robot design, a robot who can fight against enemy. Our robot us just a step towards similar activity. This robot is radio operated , self powered , and has all the controls like a normal car. A laser gun has been installed on it so that it can fire on enemy remotely when required, this is not possible until a wireless camera is installed. Wireless camera will send real time video and audio signals which could be seen on a remote monitor and action can be taken accordingly. Being in size small will not be tracked by enemy on his radar. It can silently enter into enemy canopy or tent and send us all the information through its’ tiny camera eyes. It can also be used for suicide attack, if required. DESCRIPTON OF COMPONENT USING THIS PROJECT Transmitter circuit explanation: six keys are connected in four by two matrix to the microcontroller ic1 at2051. Key data is transmitted through the 433mhztransmitter module through its pin no 3 of the microcontroller which is tx pin of the inbuilt UART of the microcontroller and works on 1200bits/sec. X1 gives the required clock input to the microcontroller c1 and r1 forms the reset circuitory connected to pin no 1 of the microcontroller. Key pressed value is transmitted through antenna Construction: Solder all the parts provided in the kit properly. First connect the jumper wires(links) before you solder the IC sockets. Donot solder integrated circuits directly on the circuit board, it may damage the ic since you may not be experianced soldering person. So solder the ic sockets first on the circuit board. Solder smaller components first like resistance and disk capacitors, assemble the complete kit one by one. Please make sure that there are no short circuits left on to the circuit board. Check the power supply at all the sockets mounted on circuit board it should be 5 to 5. v dc. FLOW CHART OF TRANSMITTER BLOCK DIAGRAM OF RECEVIER FLOW CHART OF RECEIVER AT89C2051 8-bit Microcontroller with 2K Bytes Flash Features †¢ Compatible with MCS-51â„ ¢ Products †¢ 2K Bytes of Reprogrammable Flash Memory – Endurance: 1,000 Write/Erase Cycles †¢ 2. 7V to 6V Operating Range †¢ Fully Static Operation: 0 Hz to 24 MHz †¢ Two-level Program Memory Lock †¢ 128 x 8-bit Internal RAM †¢ 15 Programmable I/O Lines †¢ Two 16-bit Timer/Counters †¢ Six Interrupt Sources †¢ Programmable Serial UART Channel †¢ Direct LED Drive Outputs †¢ On-chip Analog Comparator Low-power Idle and Power-down Modes Description The AT89C2051 is a low-voltage, high-performance CMOS 8-bit microcomputer with 2K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C2051 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications. The AT89C2051 provides the following standard features: 2K bytes of Flash,128 bytes of RAM,15 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, a precision analog comparator, on-chip oscillator and clock circuitry. In addition, the AT89C2051 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters,serial port and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Pin Configuration BLOCK DIAGRAM Pin Description VCC: Supply voltage. GND: Ground. Port 1 Port 1 is an 8-bit bi-Directional I/O port. Port pins P1. 2 to P1. 7 provide internal pullups. P1. 0 and P1. 1 require external pullups. P1. 0 and P1. 1 also serve as the positive input (AIN0) and the negative input (AIN1), respectively, of the on-chip precision analog comparator. The Port 1 output buffers can sink 20 mA and can drive LED displays directly. When 1s are written to Port 1 pins, they can be used as inputs. When pins P1. 2 to P1. 7 are used as inputs and are externally pulled low, they will source current (IIL) because of the internal pull-ups. Port 1 also receives code data during Flash programming and verification. Port 3 Port 3 pins P3. 0 to P3. 5, P3. 7 are seven bi-irectional I/O pins with internal pullups. P3. 6 is hard-wired as an input to the output of the on-chip comparator and is not accessible as a general purpose I/O pin. The Port 3 output buffers can sink 20 mA. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89C2051 as listed below: Port 3 also receives some control signals for Flash programming and verification. Reset input. All I/O pins are reset to 1s as soon as RST goes high. Holding the RST pin high for two machine cycles while the oscillator is running resets the device Each machine cycle takes 12 oscillator or clock cycles. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting oscillator amplifier. Figure 1. Oscillator Connections Important: C1, C2 = 30 pF  ± 10 pF for Crystals = 40 pF  ± 10 pF for Ceramic Resonators Figure 2. External Clock Drive Configuration Oscillator Characteristics XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. Special Function Registers A map of the on-chip memory area called the Special Function Register (SFR) space is shown in the table below. Note that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip. Read accesses to these addresses will in general return random data, and write accesses will have an indeterminate effect. User software should not write 1s to these unlisted locations, since they may be used in future products to invoke new features. In that case, the reset or inactive values of the new bits will always be 0. Restrictions on Certain Instructions The AT89C2051 and is an economical and cost-effective member of Atmel’s growing family of microcontrollers. It contains 2K bytes of flash program memory. It is fully compatible with the MCS-51 architecture, and can be programmed using the MCS-51 instruction set. However,there are a few considerations one must keep in mind when utilizing certain instructions to program this device. All the instructions related to jumping or branching should be restricted such that the destination address falls within the physical program memory space of the device, which is 2K for the AT89C2051. This should be the responsibility of the software programmer. For example, LJMP 7E0H would be a valid instruction for the AT89C2051 (with 2K of memory), whereas LJMP 900H would not. 1. Branching instructions: LCALL, LJMP, ACALL, AJMP, SJMP, JMP:These unconditional branching instructions will execute correctly as long as the programmer keeps in mind that the destination branching address must fall within the physical boundaries of the program memory size (locations 00H to 7FFH for the 89C2051). Violating the physical space limits may cause unknown program behavior. CJNE [ ], DJNZ [ , JB, JNB, JC, JNC, JBC, JZ, JNZ With these conditional branching instructions the same rule above applies. Again, violating the memory boundaries may cause erratic execution. For applications involving interrupts the normal interrupt service routine address locations of the 80C51 family architecture have been preserved. 2. MOVX-related instructions, Data Memory: The AT89C2051 contains 128 bytes of internal data memory. Thus, in the AT89C2051 the stack depth is limite d to 128 bytes, the amount of available RAM. External DATA memory access is not supported in this device, nor is external PROGRAM memory execution. Therefore, no MOVX [ ] instructions should be included in the program. A typical 80C51 assembler will still assemble instructions,even if they are written in violation of the restrictions mentioned above. It is the responsibility of the controller user to know the physical features and limitations of the device being used and adjust the ins t ructions used correspondingly. Program Memory Lock Bits On the chip are two lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below: Table 1. AT89C2051 SFR Map and Reset Values Lock Bit Protection Modes Note: 1. The Lock Bits can only be erased with the Chip Erase operation. Idle Mode In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. P1. 0 and P1. 1 should be set to â€Å"0† if no external pullups are used, or set to â€Å"1† if external pullups are used. It should be noted that when idle is terminated by a hardware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory. Power-down Mode In the power down mode the oscillator is stopped, and the instruction that invokes power down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power down mode is terminated. The only exit From power down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. P1. 0 and P1. 1 should be set to â€Å"0† if no external pullups are used, or set to â€Å"1† if external pullups are used. Programming The Flash The AT89C2051 is shipped with the 2K bytes of on-chip PEROM code memory array in the erased state (i. e. , contents = FFH) and ready to be programmed. The code memory array is programmed one byte at a time. Once the array is programmed, to re-program any non-blank byte,the entire memory array needs to be erased electrically. Internal Address Counter: The AT89C2051 contains an internal PEROM address counter which is always reset to 000H on the rising edge of RST and is advanced by applying a positive going pulse to pin XTAL1. Programming Algorithm: To program the AT89C2051,the following sequence is recommended. 1. Power-up sequence: Apply power between VCC and GND pins Set RST and XTAL1 To GND 2. Set pin RST to â€Å"H† Set pin P3. 2 to â€Å"H† 3. Apply the appropriate combination of â€Å"H† or â€Å"L† logic levels to pins P3. 3, P3. 4, P3. 5, P3. 7 to select one of the programming operations shown in the PEROM Programming Modes table. To Program and Verify the Array: 4. Apply data for Code byte at location 000H to P1. 0 to P1. 7. 5. Raise RST to 12V to enable programming. 6. Pulse P3. 2 once to program a byte in the PEROM array or the lock bits. The byte-write cycle is self-timed and typically takes 1. 2 ms. 7. To verify the programmed data, lower RST from 12V to logic â€Å"H† level and set pins P3. 3 to P3. 7 to the appropriate levels. Output data can be read at the port P1 pins. 8. To program a byte at the next address location, pulse XTAL1 pin once to advance the internal address counter. Apply new data to the port P1 pins. 9. Repeat steps 5 through 8, changing data and advancing the address counter for the entire 2K bytes array or until the end of the object file is reached. 10. Power-off sequence:set XTAL1 to â€Å"L† set RST to â€Å"L† Turn VCC power off Data Polling: The AT89C2051 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written data on P1. 7. Once the write cycle has been completed, true data is valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated. Ready/Busy: The Progress of byte programming can also be monitored by the RDY/BSY output signal. Pin P3. 1 is pulled low after P3. 2 goes High during programming to indicate BUSY. P3. is pulled High again when programming is done to indicate READY. Program Verify: If lock bits LB1 and LB2 have not been programmed code data can be read back via the data lines for verification: 1. Reset the internal address counter to 000H by bringing RST from â€Å"L† to â€Å"H†. 2. Apply the appropriate control signals for Read Code data and read the output data at the port P1 pins. 3. Pulse pin XTAL1 once to advance the internal address counter. 4. Read the next code data byte at the port P1 pins. 5. Repeat steps 3 and 4 until the entire array is read. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled. Chip Erase: The entire PEROM array (2K bytes) and the two Lock Bits are erased electrically by using the proper combination of control signals and by holding P3. 2 low for 10 ms. The code array is written with all â€Å"1†s in the Chip Erase operation and must be executed before any nonblank memory byte can be re-programmed. Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal verification of locations 000H, 001H, and 002H, except that P3. 5 and P3. 7 must be pulled to a logic low. The values returned are as follows. (000H) = 1EH indicates manufactured by Atmel (001H) = 21H indicates 89C2051 Programming Interface Every code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is selftimed and once initiated, will automatically time itself to completion. All major programming vendors offer worldwide support for the Atmel microcontroller series. Please contact your local programming vendor for the appropriate software revision. Flash Programming Modes Importance: 1. The internal PEROM address counter is reset to 000H on the rising edge of RST and is advanced by a positive pulse at XTAL 1 pin. 2. Chip Erase requires a 10 ms PROG pulse. 3. P3. 1 is pulled Low during programming to indicate RDY/BSY. Figure 3. Programming the Flash Memory Figure 4. Verifying the Flash Memory Flash Programming and Verification Characteristics TA = 0 °C to 70 °C, VCC = 5. 0  ± 10% Important: 1. Only used in 12-volt programming mode. Flash Programming and Verification Waveforms Absolute Maximum Ratings IMPORTANT: Stresses beyond those listed under â€Å"Absolute Maximum Ratings† may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Characteristics TA = -40 °C to 85 °C, VCC = 2. 0V to 6. 0V (unless otherwise noted) IMPORTANCE: 1. Under steady state (non-transient) conditions, IOL must be externallylimited as follows: Maximum IOL per port pin: 20 mA Maximum total IOL for all output pins: 80 mA If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions. 2. Minimum VCC for Power-down is 2V. External Clock Drive Waveforms External Clock Drive Serial Port Timing: Shift Register Mode Test Conditions VCC = 5. 0V  ± 20%; Load Capacitance = 80 Pf Shift Register Mode Timing Waveforms ? AC Testing Input/Output Waveforms IMPORTANCE: 1. AC Inputs during testing are driven at VCC 0. 5V for a logic 1 and 0. 45V for a logic 0. Timing measurements are made at VIH min. for a logic 1 and VIL max. for a logic 0. Float Waveforms IMPORTANCE: 1. For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs. A port pin begins to float when 100 mV change frothe loaded VOH/VOL level occurs. AT89C2051 TYPICAL ICC ACTIVE (85 °C) FREQUENCY(MHz) AT89C2051 TYPICAL ICC IDLE (85 °C) FREQUENCY (MHz) AT89C2051 TYPICAL ICC vs. VOLTAGE- POWER DOWN (85 °C) Vcc voltage Notes: 1. XTAL1 tied to GND for ICC (power-down) 2. P. 1. 0 and P1. 1 = VCC or GND 3. Lock bits programmed Ordering Information Packaging Information 20P3, 20-lead, 0. 300 Wide, Plastic Dual Inline Package (PDIP) Dimensions in Inches and (Millimeters) 0S, 20-lead, 0. 300 Wide, Plastic Gull WIng Small Outline (SOIC) Dimensions in Inches and (Millimeters) WAVE CAMERA This is definitely the smallest wireless color video camera and transmitter of its kind! This is the very latest technology Transmitter Specifications: Battery operated: 9 Volt only Current consumption 30 mA (65 mA for 80 mW unit) Smallest size 0. 6 x 0. 6 x 0. 7 Range 1000 line-of-sight (3000 for 80 mW unit) Range can be increased with high-gain receiver antennas Built-in antenna Broadcast quality B/W or color picture NTSC, PAL or SECAM systems Frequency modulation TECHNICAL CHARACTERISTICS OF RECEIVER CKT: Vcc = 9~12V Frequency of reception: 88~108MHz Consumption: 100mA Materially: The resistances are 1/4W. R1-47K R2-22K R3-100K R4-39K R5-100k R6-r12 7,5K Optionally R13-r21 15K Optionally P1-10K-Logarithmic potentiometer P2-100K-Linear potentiometer C1-39pF-Ceramic C2-47pF-Ceramic C3-2,2nF Polyester C4- c14 220nF Polyester C5-22nF Polyester C6-10nF Polyester C7- c18 180pF Ceramic C8-150pF Ceramic C9-100nF Polyester C10- c13 330pF Ceramic C11-220pF Ceramic C12- c16 3300pF Ceramic C15- c17 1800pF Ceramic C19- c21, c22 10mF/16V electrolytic C20-10nF Polyester C21 -47nF Polyester C22, c25 470mF/16V electrolytic L1,-l2 5 Coils linked with internal diameter 4mm from cupreous isolated wire 0,6mm. IC1-TDA7000 with base DIL18 IC2-LM7805 IC3-LM386 with base DIL 8 D1 BB329 or BB105 or other than old tuner televisions. SPEAKER Loudspeaker 8W/1W. S1 Switch of catering. AERIAL 50cm isolated wire CONNECTOR DB25 Fastener of 25 pin parallel door PC (LPT) -Optional REGULATIONS: A) With the P1 we regulate the intensity of sound. B) With the P2 we regulate the frequency of reception. C) Optionally: If you want to check the frequency with your PC it will be supposed you make the following energies: You assemble and the circuit that is in the blue frame. You cut the driver djpla in point A, as it appears in the circuit and you connect points A,V . If you know some language of programming as C ++, PASCAL, VISUAL BASIC, DELPHI etc you can write a program which will send in the parallel door (378 I) of PC a number from 0 until 255 checking thus the tendency of expense of simple D/A of converter (that it is in blue frame) and consequently and frequency of radio via passage VARICAP. Receiver A radio receiver is an electronic circuit that receives its input from an antenna, uses electronic filters to separate a wanted radio signal from all other signals picked up by this antenna, amplifies it to a level suitable for further processing, and finally converts through demodulation and decoding the signal into a form usable for the consumer, such as sound, pictures, digital data, measurement values, navigational positions, Today AV receivers are a common component in a high-fidelity or home-theatre system. The receiver is generally the nerve centre of a sophisticated home-theatre system providing selectable inputs for a number of different audio components like turntables, compact-disc players and recorders, and tape decks ( like video-cassette recorders) and video components (DVD players and recorders, video-game systems, and televisions). With the decline of vinyl discs, modern receivers tend to omit inputs for turntables, which have separate requirements of their own. All other common audio/visual components can use any of the identical line-level inputs on the receiver for playback, regardless of how they are marked (the name on each input is mostly for the convenience of the user. ) For instance, a second CD player can be plugged into an Aux input, and will work the same as it will in the CD input jacks. Some receivers can also provide signal processors to give a more realistic illusion of listening in a concert hall. Digital audio S/PDIF and USB connections are also common today. The home theater receiver, in the vocabulary of consumer electronics, comprises both the radio receiver and other functions, such as control, sound processing, and power amplification. The standalone radio receiver is usually known in consumer electronics as a tuner. Some modern integrated receivers can send audio out to seven loudspeakers and an additional channel for a subwoofer and often include connections for headphones. Receivers vary greatly in price, and support stereophonic or surround sound. A high-quality receiver for dedicated audio-only listening (two channel stereo) can be relatively inexpensive; excellent ones can be purchased for $300 US or less. Because modern receivers are purely electronic devices with no moving parts unlike electromechanical devices like turntables and cassette decks, they tend to offer many years of trouble-free service. In recent years, the home theater in a box has become common, which often integrates a surround-capable receiver with a DVD player. The user simply connects it to a television, perhaps other components, and a set of loudspeakers. SN54/74LS245 OCTAL BUS TRANSCEIVER OCTAL BUS TRANSCEIVER The SN54/74LS245 is an Octal Bus Transmitter/Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input (DR) controls transmission of Data from bus A to bus B or bus B to bus A depending upon its logic level. The Enable input (E) can be used to isolate the buses. †¢ Hysteresis Inputs to Improve Noise Immunity †¢ 2-Way Asynchronous Data Bus Communication †¢ Input Diodes Limit High-Speed Termination Effects †¢ ESD 3500 Volts LOGIC AND CONNECTION DIAGRAMS DIP (TOP VIEW) FAST AND LAST TTL DATA SN54/74LS245 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25 °C, VCC = 5. 0 V, TRISE/TFALL 3 6. 0 ns) FAST AND LAST TTL DATA L293D QUADRUPLE HALF-H DRIVER FEATURE †¢ 600-mA Output Current Capability Per Driver †¢ Pulsed Current 1. 2-A Per Driver †¢ Output Clamp Diodes for Inductive Transient Suppression †¢ Wide Supply Voltage Range 4. 5 V to 36 V †¢ Separate Input-Logic Supply †¢ Thermal Shutdown †¢ Internal ESD Protection †¢ High-Noise-Immunity Inputs †¢ Functional Replacement for SGS L293D logic symbol This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Logic diagram FUNCTION TABLE (each driver) H = high-level, L = low level, X = irrelevant, Z = high-impedance (off) †¡ In the thermal shutdown mode, the output is in the high-impedance state regardless of the input levels. DESCRIPTION The L293 D is a quadruple high-current half-H driver designed to provide bidirectional drive currents of up to 600-mA at voltages from 4. 5 V to 36 V. It is designed to drive inductive loads such as relays, solenoids, dc and bipolar stepping motors,as well as other high-current/high-voltage loads in positive-supply applications. All inputs are TTL-compatible. Each output is a complete totem-pole drive circuit with a Darlington transistor sink and a pseudo-Darlington source. Drivers are enabled in pairs with drivers 1 and 2 enabled by 1,2EN and drivers 3 and 4 enabled by 3,4EN. When an enable input is high, the associated drivers are enabled, and their outputs are active and in phase with their inputs. Externalhigh-speed output clamp diodes should be usedfor inductive transient suppression. When the enable input is low, those drivers are disabled, and their outputs are off and in a high-impedance state. With the proper data inputs, each pair of drivers form a full-H (or bridge) reversible drive suitable for solenoid or motor applications. A VCC1 terminal, separate from VCC2, is provided for the logic inputs to minimize device power dissipation. The L293D is designed for operation from 0 °C to 70 °C. L293D QUADRUPLE HALF-H DRIVER schematics of inputs and outputs: EQUIVALENT OF EACH INPUT TYPICAL OF ALL OUTPUTS absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Logic supply voltage range, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V Output supply voltage range, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –3 V to VCC2 + 3 V Peak output current (nonrepe titive, t 3 100 ms) . . . . . . . . . . . . . . . . . . . . . . . . . .  ±1. 2 A Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mA Continuous total dissipation at (or below) 25 °C free-air temperature (see Notes 2 and 3) . . . . . . . 2075 mW Continuous total dissipation at 80 °C case temperature (see Note 3) †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 5000 mW Operating case or virtual junction temperature range, TJ . . . . . . . . . . . . –40 °C to 150 °C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 °C to 150 °C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . 260 °C IMPORTANT: 1. All voltage values are with respect to the network ground terminal. . For operation above 25 °C free-air temperature, derate linearly at the rate of 16. 6 mW/ °C. 3. For operation above 25 °C case temperature, derate linearly at the rate of 71 . 4 mW/ °C. Due to variations in individual device electrical characteristics and thermal resistance, the built-in thermal overload protection may be activated at power levels slightly above or below the rated dissipation. Recommended operating conditions †  The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for logic voltage levels. lectrical characteristics, VCC1 = 5 V, VCC2 = 24 V, TA = 25 °C switching characteristics, VCC1 = 5 V, VCC2 = 24 V, TA = 25 °C Figure 1. Test Circuit and Voltage Waveforms PARAMETER MEASUREMENT INFORMATION TEST CIRCUIT VOLTAGE WAVEFORM IMPORTANT: A. The pulse generator has the following characteristics: tr 3 10 ns, tf 3 10 ns, tw = 10 ms, PRR = 5 kHz, ZO = 50 W. B. CL includes probe and jig capacitance. RX-1 RECEIVER MODULE MANUAL 1. Introduction: This is the radio frequency receiver module, which can facilitate the OEM designers to design their remote control a pplications in remote control in the quickest way. The circuit is designed with SMD components and the module size is small enough to be able to be fitted in almost any application. Super-regenerative Version W/O Decoder (AM): RX-3304 44mm 2. PIN DEFINITION: PIN 1: GND PIN 2: Digital Output PIN 3: Linear Output (For Testing) PIN 4: VCC (5V DC) PIN 5: VCC (5V DC) PIN 6: GND PIN 7: GND PIN 8: ANT Dimension of RX-3304: 44 mm X 11 mm: Specification Table: IMPORTANT: SR: Super-Regenerative; AM: Amplitude Modulation expensive, you can get the rolling code algorithm programmed in other low cost microcontrollers. In this approach, an EEPROM is strongly recommended so that the system’s important parameters can be stored even after power off. On the PCB layout of your control board, be very careful in the following point so that no data loss can happen: During PCB layout stage, be sure that the ground of the CPU and the external reset IC and the nonvolatile EEPROM should go to one common point first and then go to the power ground. Keep the ground line as short as possible. It is important to test if data loss happens using power noise simulator before starting the mass production. Note that transmitter codes are normally stored in the non-volatile EEPROM memory. If powerloss happens, then this means that the transmitter codes are lost from the memory and the user has to relearn the transmitter again. This is the key checkpoint before approving a design. Check with our Sales People for your requirements of Fixed Code Encoder /Decoders or Rolling Code Encoder/Decoders or Software Decoders and Low Cost Wireless Development kits and Antenna. We can use it remort. Two-Phase Motor Driver APPLICATION INFORMATION Two-phase electrical power was an early 20th century polyphase alternating current electric power distribution system. Two circuits were used, with voltage phases differing by 90 degrees. Usually circuits used four wires, two for each phase. Less frequently, three wires were used, with a common wire with a larger-diameter conductor. Some early two-phase generators had two complete rotor and field assemblies, with windings physically offset by 90 electrical degrees to provide two-phase power. The generators at Niagara Falls installed in 1895 were the largest generators in the world at the time and were two-phase machines. The advantage of two-phase electrical power was that it allowed for simple, self-starting electric motors. In the early days of electrical engineering, it was easier to analyze and design two-phase systems where the phases were completely separated. It was not until the invention of the method of symmetrical components in 1918 that polyphase power systems had a convenient mathematical tool for describing unbalanced load cases. The revolving magnetic field produced with a two-phase system allowed electric motors to provide torque from zero motor speed, which was not possible with a single-phase induction motor (without extra starting means). Induction motors designed for two-phase operation use the same winding configuration as capacitor start single-phase motors. Two-phase circuits typically use two separate pairs of current-carrying conductors. Alternatively, three wires may be used, but the common conductor carries the vector sum of the phase currents, which requires a larger conductor. Three phase can share conductors so that the three phases can be carried on three conductors of the same size. In electrical power distribution, a requirement of only three conductors rather than four represented a considerable istribution-wire cost savings due to the expense of conductors and installation. Two-phase power can be derived from a three-phase source using two transformers in a Scott connection. One transformer primary is connected across two phases of the supply. The second transformer is connected to a center-tap of the first transformer, and is wound for 86. 6% of the phase-to-phase voltage on the 3-phase system. The se condaries of the transformers will have two phases 90 degrees apart in time, and a balanced two-phase load will be evenly balanced over the three supply phases. Three-wire, 120/240 volt single phase power used in the USA and Canada is sometimes incorrectly called two-phase. The proper term is split phase or 3-wire single-phase. BLOCK DIAGRAM Figure 2. Two-Phase Motor Driver CIRCUIT DIAGRAM Heart of our robo is intel’most power family of microcontroller 8051,we are using At89c2051 Two microcontrollers ic2 is first microcontroller which acts as master controller ,decodes all the commands received from the transmitter and give commands to slave microcontroller ic3. Slave microcontroller is responsible for executing all the commands received from the master and also generating PWM pulses for the speed control . Ic4 is ld293 motor driver ic which drives two nos motors m1 and m2. Two no bumper switch are added bmp 1 and bmp2 so that in case of accident our battery dose not drains out. both the motors will stop instantly and after few second robot will move in opposite direction take turn to left or right direction and stops and stop . Circuit operation: RF433-RX is 433mhz radio receiver which receives the transmitted coded from the remote place these codes are converted to digital format and out put is available to the pin no 2 of the ic2 master microcontroller, this is the rx pin of inbuilt UART of the microcontroller. We are using UART to receive our codes at 1200 boud rate.. Based on the input codes master will give command to slave microcontroll and robo will behave as follows. a. moves in forward direction b. moves in reverse direction, c. speed controls in both the direction d. it can even turn left or right while moving forward or in reverse direction. e. Instent reverse or forward running without stopping f. In case of bump,moves reverse turn left or right and wail for the next instruction . g. On the spot left or right turn to pass through the nerrow space h. We have also added head light, back light and turing lights to left a right . These lights automatically comes on while robot is in movement. Laser gun can be fired at any time irrespective of robot stopped or moving. Bmp1 and bmp2 (forward and fterward)bumpers are connected to pin no 6 of the ic2 when ever this pin becomes low robot will stop instantly and will move few steps in reverse direction turn left or right and stops. Pin no 11,12,13,15. 16 and 17 of the master microcontroller are connected to the slave microcontroller ic3 to give the following pulses to the slave microcontroller 1. Start /stop 2. Increase speed 3. Increase speed 4. Direction change 5. Turn left 6. Turn right Slave microcontroller ic3 pins 15,16,17,18,19 are connected to ic4 motor driver ic, pin17 of the slave gives the pulse width modulation pulse which is connected to pin 1 and 9 of ic4 this is en pin of ic 4 Pin 18 and 19 controlls one motor m1 and pin 15 and 16 of the slave controller controls the m2 moto When one of the pin becomes high and other pin becomes low motor will turn in one direction reversing the polarity of pin motor will turn other direction. When forward command is received ,both the motors will run in forward direction. When reverse command is received both the motors will run in reverse direction. while moving in forward or reverse direction if left or right command is received one of the motor stops and other keeps moving this action gives left or right turn. For example if left motor is stopped , robot will turn in right direction, and when right motor is stopped robot will torn in left direction. hen fire command is received, pin no 14 of ic2 will go high and transistor Q1 will become ON and laser diode d9 will get forward biasing through d7,d8 and it will glow. R2 r3, r15 and r16 are pull up resistor connected to pin no 12 and 13 of ic2 and ic3 Crystal X1,X2 and apair of 33pf capacitor gives the required clock pulse to both the microcontroller. Capacitor r1 and c 1 and c8,r14 gives the required reset pulse to microcontroller pin no 1 datasheets. these can be downloaded free from the manufacturers site . robo is powered by five non rechargable 7. 2v 1200ma battery pack which gives 7. v dc out put. IC1 7805 is a regulator ic gives 5v regulated supply. Unregulated 7. 2 is used to drive the motor circuit and 5v regulated power is for the rest of the circuit. Capacitor c11 and c12 are for spark quench. C4, C5 c9,c10 are filter capacitors. Capacitor c5 and c10 are to noise supperession. resistance r12 is for pullup. R5,r13,r6,r7,r8,r9,r10. r11,r13 r17,r18,r19 ,r20 and r21 are for current limiting purpose. COMPLETE PHOTOGRAPH OF THE ASSEMBLED ROBT closup look of new improved connection diagram of battery and other connection of 7805 regulator( red wire +line black wire- line. CLOSE LOOK OUT AFTER CONNECTION OF BUMPER ASSEMBLY COMPLETE BUMPER ASSEMBLY DIAGRAM OF ROBOTIC CAR DIAGRAM OF ROBOT CONTROL REMOTE ? PCB BOARD OF DIFFERENT COMPONENT PCB BOAR D OF ROBOTIC CAR WITOUT LABELAING PCB BOARD OF ROBOTIC CAR AFTER LABELAING ? COMPLETE OVERVIEW OF PCB OF ROBOTIC CAR WITH TRANSMITTER RECEIVER ? COMPLETE PCB AND OVERVIEW OF REMOTE ALSO CIRCUIT DIAGRAM RESPECTIVELY Fig: (a) (b) Fig:(c) 3. Noise Immunization This RF receiver is sensitive to RF noise in the pass band because the desired transmitter signals are at very low power levels. Some common noise sources are microprocessors, brush-type motors and high-speed logic circuits. If the rise time and fall time of the clock in a microprocessor are fast enough to produce harmonics in the frequency range of the receiver input and the harmonics fall within the pass band of the receiver, then special care must be taken to reduce the level of the harmonic at the antenna port of the receiver. Based on above analysis, the following actions have to be taken: A. Microprocessor choice: Choose those microprocessors which has lowest rise time and lowest fall time,if available. B. Brush-type motor choice: Choose those brush-type motors, which has spark suppression built in or better not to use such type of motors. C. Logic circuits choice: High-speed logic circuits generate noise similar to microprocessors. Thus better to choose those circuits with the lowest rise time and the lowest fall time, if available. D. Place the receiver and its antenna as far from the noise source as possible. E. During PCB layout, keep line lengths at a minimum that carry high-speed logic signals or supply brush type motors. Such lines work like antennas that radiate the unwanted noise. F. If possible, enclose the noise source in a grounded metal box and use RF-decoupling on the input/output lines. G. It is advisable to use separate voltage regulator for the RF receiver. If the same voltage regulator has to be used for cost purpose, then a decoupler circuit is recommended so that high frequency noise can be screened. H. The ground path from the receiver module should go directly to the power ground, in between, no other ground paths can join in, otherwise, noise will be introduced in and receiver function will be greatly influenced. ? 4. Recommended Antenna Suitable antennas are required to the success of low-power wireless application. There are some key points on applying the antennas: A. Antenna should be placed on the outside of the product. And try to place the antenna on the top of the product. B. Antena cannot be placed inside a metal case because of its shielding effect. C. Antenna design involves expensive test equipments such as vector network analyzer and calibrated test antenna. Unless you have access to these equipments, the use to an antenna consultant is recommended. D. In most indoor locations, dead spots can be found where reception is difficult. These dead spots are due to multiple transmission paths existing between two points because of reflections off metal objects such as steel beams or metal doors. They happen when the path lengths effectively differs by an odd half-wavelength. This explains the phenomenon when you find that at some locations the reception effect is very poor, but beyond that the reception becomes normal. E. 50-Ohm antenna is recommended for the best matching. F. For 433. 92MHz application, antenna length = 17 cm. ? WIRELESS TRANSMITTER MODULE TX1-433. 92MHZ-S SPECIFICATION ROBOTX. HEX 1000000001430000000000000000000000000000AC :100010000000000000000000000000C0E0758DE856 :10002000758BE8E533700DD2A6D532148534328550 :100030003533800CC2A6E5336006D53303853432F0 :10004000D0E03275A0007535087533087532087533 :100050003408758920758DE8758BE8D2ABD2AF3046 ::1000F000340535853432853533D28E016775340148 :10010000D28E01672087FDD2A0D2A4D2A1D2A5C2EF :100110008E01439007D07530C8000000D530FA1525 :1001200082E582B4FF021583458 370EA2200000055 :00000001FF TYPICAL APPLICATION REMARK Antenna length about:23 cm for 315 MHz :17 cm for 434 MHz ? ROBORX. HEX :1000000001430000000000000000000000000000AC 100010000000000000000000000000C0E0758DE856 :10002000758BE8E533700DD2A6D532148534328550 :100030003533800CC2A6E5336006D53303853432F0 :10004000D0E03275A0007535087533087532087533 :100050003408758920758DE8758BE8D2ABD2AF3046 :1000600087FD2087FDD28E20801820841F20823AB1 :1000700020854120835120816B20870280E9310453 :1000800080E5C2A0C2A4C2A1D2A580DBC2A1C2A544 :10009000C2A0D2A480D1C2A1C2A5D2A0C2A480C74E :1000A000C2A0C2A4D2A1C2A580BDC2A1C2A0D2A535 :1000B000D2A480B3D2A1D2A0C2A5C2A480A9C2A159 :1000C000C2A5C2A0C2A4222083FDC28EE534640F63 :1000D000600E05341535853432853533D28E01678F :1000E000D28E01672081E0C28EE535640F600E1567 1000F000340535853432853533D28E016775340148 :10010000D28E01672087FDD2A0D2A4D2A1D2A5C2EF :100110008E01439007D07530C8000000D530FA1525 :1001200082E582B4FF021583458370EA2200000055 :00000001FF ? CONCLUSION APPLICATION S OF SPY ROBOT †¢Automotive remote entry systems †¢Automotive alarm systems †¢Gate and garege door openers †¢Wireless data transmission †¢Electronics door lock †¢Burglar alarm systems †¢ADVANTAGES:- †¢Small in size †¢Low cost †¢High energy †¢Efficiency. DISADVANTAGES:- †¢Handling is difficult. †¢If hump is came there is a chance for taking lot of charge from battery to move. We hope that this project is helpful to our juniors who are interested in this field REFERENCE RELATED WEBSITE:- 1. www. spykeeworld. com2. www. extremeElectronics. com 3. www. robotsrule. com4. www. smartrobots. com 5. www. spykeestore. com6. www. robotstxt. com 7. www. spyreview. co. uk RELATED BOOKS:- 1. Amphibionics (Karl Williams) 2. Build your own robots (Karl Lunt) 3. Combat robots (Chris Hannold) 4. Robot inventors workshop (Greg Vogt) 5. Artificial intelligence and mobile robots (David Kortenkemp) 6. Spy vs spy (Antonio Prohias) 7. Robots magazine.